The 6502 was the CPU in my very first computer system (an Apple II plus), along with lots of other popular personal computer of the late 1970s and 80s. It resided on well into the 1990s in video game consoles and chess computer systems, primarily in its upgraded “65C02” CMOS variation. Here’s a re-implementation of the 65C02 in an FPGA, in a pin-compatible format that lets you update those old computer systems and video games to 100 MHz clock rate!
The principle
The concept of executing a CPU core inside an FPGA is not brand-new, obviously. The CPU core I am utilizing is not my own, however was established as a 6502 core by Arlet Ottens, and extended to cover the 65C02 opcodes by Ed Spittles and David Banks. A huge thank-you to Arlet, Ed, and Dave for establishing the core and sharing it easily! Hyperlinks to their initial work are on the
Files & & Links page.
I packaged this in a Spartan-6 FPGA (with 64 kByte on-chip RAM), on a little circuit board which is simply the size of a 40-pin double inline bundle, with pins matching the 65C02 pinout. I included reasoning inside the FPGA which can access the external 65C02 bus with the proper timing, based upon whatever clock is being available in from the host system. Inside the FPGA, the CPU core performs at 100 MHz. I called this the “65F02”, where the “F” may mean FPGA or for “Fast”.;–RRB-
The 65F02 circuit board: very same footprint and pinout as the initial 6502 and 65C02 CPU.
The concept is to utilize this as a “universal” accelerator for 6502 and 65C02-based host computer systems– simply plug it into the CPU socket. The only thing the FPGA board requires to learn about its host is the memory map: Where does the host have memory-mapped I/O? Approximately 16 various memory maps can be kept in the FPGA, and picked by means of a tiny DIP switch. Upon power-on, the 65F02 gets the total RAM and ROM material from the host and copies it into the on-chip RAM, other than for the I/O location. The CPU gets going, utilizing the internal memory at 100 MHz for all bus accesses other than for any I/O addresses– for these, the internal CPU stops briefly, and an external bus cycle is begun at whatever the external clock speed is.
Congratulations to Roland Langfeld, who recommended this sophisticated method of incorporating an accelerator into practically any host, and has actually contributed a lot throughout the screening and debugging effort. Roland’s initial interest remained in 6502-based chess computer systems (there were some actually great ones in the 1980s). We have actually effectively checked the model 65F02s in an Apple II and a Commodore 8032, as well as different chess computer systems.
Thanks go to Roland Langfeld, for the concept for the 65F02 and lots of hours of debugging and screening in Mephisto chess computer systems and the Commodore 8032.
The very first compact 65F02 set up in a Mephisto Milano chess computer system. The inhabited circuit board is less than a millimeter greater than the initial chip plan, for this reason likewise suits tight enclosures.
Supported host systems
Chess computer systems
We have actually concentrated on Mephisto chess computer systems initially, because these are at the center of Roland’s collector’s interest. Numerous others are on the wishlist, consisting of Fidelity (Elite A/S Budapest and Glasgow, Prestige, Avantgarde), Novag (Super Constellation, Super Expert C), SciSys (Turbostar), …
- Mephisto MM II and B&P
- Mephisto MM IV, MM V, Rebel Portoroz (MM X)
- Mephisto Polgar
- Mephisto Milano and Nigel Short
- Mephisto Rebell 5.0
- Novag Constellation Forte A/B
- Chafitz ARB (numerous Sargon variations) and MGS
Microcomputers
Far, we are supporting the 2 6502-based members of the timeless 1977 “Trinity” of home computer systems– the Apple II and the Commodore PET series. It might be possible and beneficial to likewise support some somewhat later makers: The Acorn BBC Micro, Atari 400 and 800, and perhaps the Commodore C64 entered your mind. I do not have any of these computer systems. Please call me if you are interested to aid with an adjustment of the 65F02!
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Apple IIconsisting of the II plus and europlus, and probably the// e. Quite a bit of software and hardware hoax by Steve Wozniak, and the older designs do not support a genuine 65C02– however the 65F02 is a bit more generous in its bus timing and works perfectly. The Disk II floppy drive works well under DOS 3.3; assistance for the language card is under advancement.
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Commodore PET/CBM as much as 8032A spick-and-span and “by the book” style. The exact same memory map ought to work for all designs from the PET 2001, the 3000 and 4000 series, and the 8000 series approximately the 8032. (But leaving out the 8096 and beyond, which need memory bank changing.) Far we have actually checked this on the 8032 just; the 8050 floppy drive works.
A caution remains in order here. The personal computer, with their versatility and expandability on both the software and hardware side, are bound to come across restrictions and incompatibilities:
Memory growth boards and bank changing require to be understood to and imitated by the 65F02; and because the 65F02 just has 64 kByte of RAM on board, it can not completely speed up the extended memory. While the 65F02 makes an effort to spot the access to time-critical peripheral gadgets, and change back to the initial sluggish speed momentarily, there will most likely be incompatible software application or add-on hardware. Some software application you merely do not desire to be sped up– attempt an action computer game at 100 MHz to comprehend that issue …
The 65F02 supports an optional hardware switch to disable the velocity. By doing this, one can still choose in between sped up operation and initial speed before one begins the host computer system. In non-accelerated mode, the 65F02 must be completely suitable with any software application or add-on hardware. (Well; unless the software application utilizes undocumented 6502 opcodes …)
Task status
This is a pastime task, and I have no strategies at the minute to take it industrial.
Numerous of the small-form-factor PCBs have actually been put together, and have actually been effectively checked in those computer systems. The evaluated computer systems consist of environments with TTL and CMOS reasoning levels, and clock rates varying from 1 to 5 MHz. IRQs and NMIs are utilized in the hosts; a few of the Mephisto chess computer systems actively utilize the READY signal to decrease the CPU, and the 65F02 appreciates that well. We have actually not utilized the SO (set overflow) input in earnest, however think it to work.
The chess computer system neighborhood has actually put the 65F02 through its speeds and discovered some really good enhancements in playing strength for the old chess computer systems. Games and commentary can be discovered in the German
schachcomputer.info online forumin specific in the threads
here
hereand
here
If you have concepts for the 65F02, wish to assist in establishing assistance for extra computer systems, wish to discuss it, please call me by means of the e-mail address supplied in the About area.
Update, July 2022: The worldwide electronic devices supply traffic jams impact this job too. The Xilinx Spartan-6 FPGA (in the needed plan and speed grade) has actually moved from a preparation of more than one year to “we do not understand”. The 65F02 will rest on the back burner up until the supply circumstance ideally goes back to typical.
The 65F02 can straight change a 6502 or 65C02 in their 40-pin DIP socket.
The bottom side of the circuit board. Delegated right: clock oscillator, decoupling capacitors, level converters for 5V input signals, voltage regulators.